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DX-T501 is a terminal baseband chip for industrial Internet applications that supports the 3GPP R15 protocol standard for industrial needs. The chip adopts heterogeneous multi-core soft baseband architecture, and integrates DX-M DSP core, ARC470D processor core, Real Time RISC processor core and flexible and efficient hardware accelerated decoding ASIC unit independently developed by Zhongkejing. The whole chip is based on software definable architecture and supports flexible customization under different industrial scenarios. The chip is based on the 28nm process, the uplink peak rate can support more than 1Gbps, support authorization/
Features:
Real Time RISC LTE/5G Hardware Accelerator Architecture with Quad-Core Autonomous DSP Core Dual-Core ARC470D
Supports 3GPP R15, R12 and MF2.0/1.1 protocols
Support 5.8G frequency point, and the frequency point is adjustable
Support peak downlink 200Mbps, uplink 1Gbps or more
Support 2T2R antenna configuration
CP module integrates baseband, RF and power management to reduce hardware development difficulties
Using clock gating (Clock Gating), power gating (Power Gating) and other comprehensive system low-power technology
Application:
Industrial Internet
