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With the rapid development of artificial intelligence, cloud computing and high-performance computing, the demand for data transmission rate is increasing at an unprecedented rate. Successful 224 Gbps PAM4 signaling requires careful analysis of signal integrity and thermal effects. This rate requirement has a qualitative leap compared to previous generations of technology, and has brought new challenges in interconnection solutions, technical methods and implementation methods. This article will provide an in-depth analysis of the key features of 224 Gbps PAM4 systems from a technical perspective, discuss the technological innovations required to achieve this rate, and look at the future development path beyond 224 Gbps.
Samtec has a unique organizational advantage in the connected industry, enabling true collaborative innovation with fully integrated capabilities. This integrated mode of operation brings innovative solutions and effective strategies to support the optimization of the entire signal path. From chip-level interconnects to system-level architectures, each step needs to be carefully designed and optimized to maintain signal integrity at 224 Gbps.
224 the key role of interconnection technology in the Gbps era
In 224 Gbps deployments, signal integrity, power delivery, and thermal management are key technical challenges. With the increase of data rate, the integrated functions of the chip itself are also increasing, resulting in a significant reduction in the loss margin of the "off-chip" part of the design. By selecting the right materials, design techniques, system architecture, and resource configurations, signal integrity and thermal issues can be mitigated while supporting the increased power demands of 224 Gbps systems.
The backplane, midplane, near-chip/on-chip, and front-panel (copper and pluggable optical modules) all require high-performance, high-speed, low-latency interconnect solutions. This article provides designers with a detailed breakdown of the interconnect architecture choices available 224 Gbps and a vision of future requirements for 448 Gbps, with measured data for comparison.
Near-chip connector scheme
In 112 Gbps PAM4 designs, the near-chip approach is widely adopted, where the connector is placed next to the ASIC and connected to a twinax cable, which is then linked to the front panel, backplane, or midplane. This method effectively reduces the total loss of the channel. This near-chip approach can also be deployed in some 224 Gbps PAM4 system designs, depending on design density and power requirements.
However, the near-chip approach also faces technical challenges. Designers must allocate IO to BGA and PCB solder balls, the size of which is limited by current plated-through-hole PCB technology (that is, limited to 0.8mm BGA pitch). With this approach, it is difficult to achieve signal integrity up to and beyond 56 GHz. Another problem is that the interconnect resources allocated to IO are now not available for equally demanding power issues.
Co-packaged connector scheme
Another related design challenge for near-chip cable systems is reflections from the vertical package components: BGA vias, solder balls, and package cores. If the connector is placed directly on the package-a co-packaged copper or optical module solution-you can avoid these reflections and solve the expansion problem, thereby greatly improving the system margin. Of course, the CPX solution must be thin enough to be placed under the radiator.
PCB feature expansion is much slower than ASIC feature expansion using silicon CMOS, which requires a new approach to bridge this gap. Today's design requirements naturally push designers to use co-packaged copper cables to meet the required IO density expansion. Compared with the near-chip approach, CPX can achieve a higher density footprint in the separable interface for assembly due to the different system hardware decomposition. The CPX approach is much more sophisticated, using small connectors at the base plate, allowing 512 ports and higher IO counts.
At 224 Gbps data rate, CPX has higher value to recover system margin from package reflection and PCB trace routing loss. Samtec has been developing direct-to-package technology for many years, initially for 112 Gbps and now for 224 Gbps PAM4.
Samtec Si-Fly HD®The connector is specifically developed for 224 Gbps and higher, and it can be placed next to the ASIC or on the chip package itself. In a co-packaged configuration, there is no routing through the PCB and therefore no consequent "loss per inch". Moving to a CPX configuration can save up to 3 dB of package via, solder ball, and PCB routing loss, which may determine the success or failure of a 224 Gbps PAM4 system.
The silicon chip is placed on the chip substrate, which is the most expensive part of the system, so any connector built into the chip package must be very small. The Si-Fly HD connector has a size of 14 mm² and can support 64 differential pairs (64 twinaxial cables).
CPX is handled differently because the connector needs to be soldered to the chip substrate. Si-Fly HD connectors use Samtec's post tail design to maintain the advanced structural integrity of the solder joints during and after reflow. This non-solder ball design improves uniformity, repeatability, and coflatness. The copper or optical cable is then inserted directly into the chip package. The specific solder (designed for SAC305, but indium-based low-temperature solders can also be used), stiffeners, and assembly processes may vary from application to application.
Samtec tests its 224 Gbps PAM4 interconnect solution against channel models from industry standards organizations such as IEEE 802.3. Measurements on the Samtec Si-Fly HD CPC exceeded expectations, with a significant improvement in insertion loss compared to the near chip in a similar implementation.
In fact, connecting from the top of the package provides compelling reflection and insertion loss advantages. The simulation model of the system design and the measurement verification of loss and reflection show excellent performance. Si-Fly HD cable assembly measurements show excellent insertion loss at Samtec Eye Speed®Smooth insertion loss deviation on Hyper Low Skew Twinax.
Insertion loss is a key consideration when 112 and 224 Gbps. But one of the most difficult electrical performance criteria is crosstalk. When driven to ultra-high densities, crosstalk typically increases due to the proximity between pins. Fortunately, measurements on the Si-Fly HD CPC show impressive crosstalk performance. Measurements show that the Si-Fly HD CPC achieves accurate correlation and an integrated crosstalk noise FEXT performance of 0.36 mV rms, well below the target of 224 Gbps.
Offset is another design concern for 224 Gbps PAM4, and the impact can be significant. Offset-like distortion may manifest as delay differences within a differential pair, asymmetry of complementary traces during differential pair construction, or differences in drive signals. The design of the coupling and the amount of reflection determine the significance of the effect. Plot of differential offset versus frequency for the complete cable assembly shows that these offset levels produce the channel's signal to common mode ratio in the 18 to 36 dB range.
Samtec conducted significant R & D on the impact of offset, comparing Flyover®effects in twinaxial cables and PCB traces. Fortunately, the close-coupled, co-extruded twinaxial cable has excellent offset performance, even under realistic bending conditions, can achieve impedance and insertion loss stability, so that the offset is completely under the control of the implementer. This is in sharp contrast to other twinaxial cable structures.
For 224 Gbps PAM4 systems, control offset is critical for predictable performance, especially because one unit interval is about 9 ps at 224 Gbps PAM4. System designers can use CPX and near-chip Flyover cables to reduce interconnect offsets to manageable levels.
AsAuthorized Distributors of Samtec Products，BONCHIPAlways committed to providing customersState-of-the-art high-speed interconnect solutionsandBest quality supply chain services. We understand the exacting requirements of 224 Gbps PAM4 systems for interconnection technology, which we offer:
Full line product supply
Complete Samtec Si-Fly HD family, including co-package and near-chip solutions
Eye Speed®Hyper Low Skew Cable Assemblies Full Range
Full test and validation tool support
Comprehensive availability of technical documentation and design guides
Professional Technical Support
OurHigh-speed digital signal expert teamExperience designing high-speed interconnects to provide:
224 Gbps system architecture design consulting
Signal integrity analysis and simulation support
Thermal Management Solution Design Guidance
System-level test and verification services
Fast delivery guarantee
With a sound inventory management system and a global logistics network, we ensure that our customers' R & D and mass production projects areSmooth propulsion, provideThe most competitive delivery timeTo provide reliable protection for customers' product launch plans.
Value added service
Technical seminars and product training
Reference design and appliance support
On-site technical support and failure analysis
Cost optimization and supply chain management advice
For 224 Gbps designs, Samtec provides a complete interconnect solution, including the flagship product Si-Fly HD high-density 224 Gbps PAM4 co-package and near-chip cable systems.
Co-packaged cable systems provide the lowest loss signal transmission from the package to the front panel or backplane while providing the highest signal density. The Si-Fly HD system allows system architects to use the same electrical substrate connector to interchange copper cables for short distance/vertical expansion and interchange optical modules for extended distance/horizontal expansion.
Co-packaged copper connections eliminate insertion loss in the BGA breakout zone and PCB. This technology enables complete 224G passive DAC 224G channels, enabling a low-power linear pluggable optical module front panel solution, which may bring great potential for connectivity in some emerging AI architectures.
Si-Fly HD co-package solutions use the same connectors for electrically pluggable co-packaged copper and/or co-packaged optical modules to achieve high-density, high-performance interconnects on 95 mm x 95 mm or smaller substrates. It supports up to 170 differential pairs per square inch and is designed for high-density interconnects and package substrates. Si-Fly HD is well suited for use in switching modules in systems where 224 Gbps bandwidth bottlenecks are expected.
Si-Fly HD includes Samtec's Eye Speed Hyper Low Skew cable, which is characterized by dual-axis foam dielectric and the industry's best signal integrity performance at 224 Gbps PAM4.
The Samtec Si-Fly HD near-chip solution has a signal density of 60 differential pairs per square inch and is designed for use with traditional PCB substrates. The connector has a length of 15.90mm and a depth of 21.65mm. Near-chip Si-Fly HD provides system architects with the signal integrity benefits of ultra-high-density Flyover solutions while preserving legacy system configuration items through PCB-compatible footprints.
Samtec FOSFP-2 224 Gbps PAM4 Flyover panel assembly uses Samtec Flyover cable technology to support up to 1.6 Tbps PAM4 total data rate, and has direct connection contacts to optimize signal integrity. Designers can also choose Samtec's FOFSP 1600 pluggable optical module front panel connectors.
The Si-Fly HD series also includes Si-Fly HD board-to-board mid-board system, supporting 60 differential pairs per square inch. It can be used in fully differential pairs, or in a hybrid configuration of differential, single-ended, and power supplies. Si-Fly HD board-to-board midplane systems are ideal for use between PCBs and GPUs, for example in blade-level networks.
Si-Fly HD backplane with 32 AWG or 28 AWG Eye Speed Hyper Low Skew Thinax™for 64 differential pairs.
Designers of 224 Gbps PAM4 systems are also using Samtec Bulls Eye®The high-performance test system, which is designed to test chips and systems at 200 Gbps data rates, is currently being used to characterize signals up to 448 Gbps.
Samtec continues to develop high-speed, high-performance interconnects based on the evolving model of standards bodies. The key to achieving the next level of signal speed lies in the application of advanced technologies, such as advanced solder paste technology. With the continuous development of technology, 448 Gbps and higher will be possible, which will further promote the development of artificial intelligence, ML and high-performance computing.
BONCHIPSamtec High-Speed Interconnect ProductsA reliable partner., has always been committed to providing customersState-of-the-art technology products and best supply chain services. OurProfessional TeamWith deep technical background and rich industry experience, we can provide comprehensive support from architecture design to mass production for customers' 224 Gbps PAM4 projects.
Choosing BONCHIP is the perfect combination of professional technical support, reliable product quality and efficient supply chain services!
